Sleep mode. Power is cut to most components except the system memory (RAM).
The RTC clock must vibrate at exactly this frequency to maintain system time and generate standby clock signals. VCCRTC: The stable power supply to the RTC section. 3. Stage 2: The Super I/O and EC Controller Initialization
The BIOS performs the Power-On Self Test, checking RAM, GPU, and peripherals. Exclusive Troubleshooting Tips for Technicians
When an enthusiast presses the power button on their PC, the event often feels instantaneous. One moment the system is a silent collection of silicon and metal; the next, fans spin, lights flash, and the operating system loads. It feels like a simple switch. desktop motherboard power sequence pdf exclusive
The motherboard power sequence is the precise, chronological order in which a desktop computer's power management system initializes various voltage rails. This complex process occurs in the fractions of a second between pressing the power button and the motherboard successfully executing the Basic Input/Output System (BIOS) or Unified Extensible Firmware Interface (UEFI) code.
Modern desktop motherboards rely on standard ATX power supply unit (PSU) specifications coupled with the Advanced Configuration and Power Interface (ACPI) protocol to regulate system states.
Understanding the Desktop Motherboard Power Sequence: A Complete Diagnostic Guide Sleep mode
Once +3.3VSB stabilizes, the SIO receives its internal power-on reset signal ( SIO_RST# ).
The desktop motherboard power sequence is a highly logical, deterministic cascade. By understanding the dependencies—how standby power enables the Super I/O, how the Super I/O wakes the PCH, and how the PCH coordinates with the PSU and CPU VRMs—diagnosing complex hardware failures changes from guesswork into a precise, step-by-step science.
[Power Button Pressed] │ ▼ [SIO receives PWRBTN#] ──► Drops to 0V, then back to 3.3V │ ▼ [SIO sends PM_PWRBTN# to PCH] │ ▼ [PCH Releases Sleep States] ──► SLP_S4# and SLP_S3# go HIGH (3.3V) │ ▼ [SIO asserts PSON#] ──► Drops to 0V ──► Pulls ATX Pin 16 Low │ ▼ [PSU Wakes Up] ──► Main Rails (+12V, +5V, +3.3V) Activate 1. The Power Button Pulse ( PWRBTN# ) VCCRTC: The stable power supply to the RTC section
is active-low. The SIO pulls this pin down to 0V (Ground) .
The CPU reads the initial instruction from the BIOS chip via the SPI bus.
: Enabled by SLP_S4# / SLP_S3# , local power converters turn on the main system voltage rails. Memory power is enabled. +1.0V / +1.05V (PCH/VCCSA): The PCH voltage rail turns on. 5. The Reset Sequence (Power Good) VCCPLLcap V sub cap C cap C cap P cap L cap L end-sub